Dascari
20179
20
2
1.1 - Invert - Getting the basic tools
1.2 - And
1.3 - Or
1.4 - XOR - I originally built this with an OR, NAND and ANDgate. I decided during a later level that I would use NAND wherever it wasn't impractical, so I came back to this one. Breaking it down to NANDs lets it use fewer gates.
2.1 - Half Adder - And tossing out those tools. I built this originally with an OR gate and an Inverter. In later levels, you need to expand your tools to optimize the NAND gates properly, so I went back and expanded as many as I could.
2.2 - Full Adder - Similar to the above, but you need to add the carry bit as well.
2.3 - Multi-bit Adder - I haven't expanded and optimized this one yet, but it's gonna be messy when I do.
2.4 - Increment - Carry successfully ignored.
2.5 - Subtraction - Fun fact, when making a binary number a negative, you'll have to add 1 to get the actual number.
2.6 - Equal to Zero - Just expanded, using 3 ORs and an Inverter is already optimal.
3.1 - Selector - Continuing to use only NAND gates.
3.2 - Switch - I should probably set those two top NANDs to be back to inverters. It cleans it up a little bit, and an INV and NAND are the exact same thing.
4.1 - Latch - Simplest basic toggle.
4.2 - Data Flip Flop
4.3 - Register - I really can't see where I can trim this down. I have no spare singles, and by expanding it to just NANDs I was able to use have the two DFFs share the ST and CL inputs.
4.4 - Counter - Getting to the point where expanding is so impractical due to limited space for placing the NANDs
4.5 - RAM - I'm not sure I could place 293 NANDS on the screen and still see where the connections go.
5.1 - Unary ALU - Simple, but not optimal. I expect that if I expand the selects into NANDs, like I plan to later, I'll be able to strip out a few gates and optimize this thing.
5.2 - ALU - Not sure yet how I can strip out some components. Need to go back and optimize this later.
5.3 - Condition - Fewer components, such as putting in the ORs and Inverters here, but I like the way it looks, and would prefer to use NANDs where I can.
6.1 - Combined Memory - Optimizing my Register and RAM should optimize this further than merely the simplest solution.
6.2 - Instruction Decoder - I want to build a switch 16, but the custom components feature isn't working for me, and without a combiner or read16 I'm not sure I can do it.
6.3 - Control Unit - Uggh. It's so ugly.
6.4 - Program Engine - Clearly the most difficult one yet.
6.5 - Computer - Not much to say about this one. One more to go.
6.6 - Input and Output - Sure, technically I can replace the inverted NAND with an AND to make it 3, which counts as simplest. But why break tradition of expanding out my tools when I can?
Nandgame.com
Good game, gave me a new appreciation and understanding of electronic circuitry.
ArrowQuivershaft
"Less components", means "Less items on the field", not "Less NAND gates." Register could be two DFFs, which is fewer components. Thanks!
FabulousBadass
I am not smart enough for this shit.
j69cochran
And why are you doing an increment after inverting Y for your subtraction solution? There's that nice unused carry in for your adder that can perform the increment for you. So, assuming you have the following:
cousteau
It's a well known(?) fact that you can build any digital combinatorial circuit entirely out of NAND or NOR gates.
cousteau
Re: combinational… wasn't expecting flip flops to be involved.
jubydoo
To simplify the ALU, note that you can do inversion through a unary ALU.
Zokalyx
I thought this would be not optimal but in fact there are the same amount of NAND gates with both methods, so using unary ALU is better.
eandrewtab
#17 "4.5 - RAM" -- pass "st" thru the switch, not "cl"
eandrewtab
I'm getting 357 as "simplest possible" (vs 293), tho. Figure bugs have been fixed in earlier levels?
eandrewtab
Hmm okay I can't get #14 (DFF) to work as shown, and my solution has 9, not 8, NANDs. This is presumably where it's all going wrong for me..